October 13, 1998 6:00 PM PDT
HP has two-pronged chip plan
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While HP plans to extend its PA-RISC architecture on into the year 2003 with an 8900 chip running at a speed of 1.2 GHz (1200 MHz), the PA-RISC chip apparently will be phased out eventually.
"These are mainly for transition plans. Eventually our entire product line will be based on IA-64," said Jim Carlson, director of marketing for IA-64 systems at HP, speaking at the Microprocessor Forum today.
| The future of HP's PA-RISC chips | ||
| Chip | Clock Speed | Release Date |
| 8500 | 360 MHz | end of '98 |
| 8500 | 440 MHz | January '99 |
| 8600 | 560 MHz | 2000 |
| 8700 | ? | 2001 |
| 8800 | ? | 2002 |
| 8900 | 1.2 GHz | 2003 |
| Source: HP | ||
Two products HP announced--the first two computer systems running on the 8500--will have a supporting chip set that can handle PA-RISC, IA-32 (Intel's current 32-bit chip architecture), and IA-64 (the 64-bit architecture Intel currently is developing).
The strategy will free customers from worrying about which hardware they purchase, Carlson said. "What counts is what OS they put on it."
Customers can choose from primary cache, which is divided into a 1MB data cache and a 0.5MB of instruction cache.
A 1.5MB primary cache is bigger and faster than the secondary cache offered on most chips today. HP says the 1.5MB cache is the biggest on-chip memory.
The 8500 has a 0.25-micron process size, meaning that more transistors can be packed into the same surface than possible with the 8500's 0.5-micron predecessors. Freeing up all that real estate enabled HP to increase the chip's cache size.
HP has been working with Intel to develop Intel's new 64-bit IA-64 processor architecture.
The IA-64 chips will have "binary compatibility" with HP's PA-RISC chips--in other words, the IA-64 chips will be able to run software written for the PA-RISC chips.
Intel's first IA-64 chip, code-named Merced, is scheduled for release in 2000.
Intel is an investor in CNET: The Computer Network, publisher of News.com.
